/*
  cpu_map_adc.h - ADC pin mapping configuration file
  Part of Grbl

  Copyright (c) 2019 Luigi Santivetti <luigi.santivetti@gmail.com>

  Grbl is free software: you can redistribute it and/or modify
  it under the terms of the GNU General Public License as published by
  the Free Software Foundation, either version 3 of the License, or
  (at your option) any later version.

  Grbl is distributed in the hope that it will be useful,
  but WITHOUT ANY WARRANTY; without even the implied warranty of
  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  GNU General Public License for more details.

  You should have received a copy of the GNU General Public License
  along with Grbl.  If not, see <http://www.gnu.org/licenses/>.
*/

/* The cpu_map_adc.h files serve as a central pin mapping selection file for the ADC
   module for different processor types or alternative pin layouts. This version of
   Grbl officially supports only the Arduino Mega328p. */

#ifndef cpu_map_adc_h
#define cpu_map_adc_h

#ifdef CPU_MAP_ATMEGA328P

// Define ADC registers
#define ADC_ST1_REG                ADCSRA
#define ADC_ST2_REG                ADCSRB
#define ADC_MUX_REG                ADMUX
#define ADC_HGH_REG                ADCH
#define ADC_LOW_REG                ADCL
#define ADC_PRR_REG_cpu            PRR // Outside the ADC block

// Set to enable in hardware conversion triggering (auto-trigger)
#define ADC_ST1_TRIGGER_BIT        ADATE
// Set to start a conversion (manual-trigger)
#define ADC_ST1_START_BIT          ADSC
// Set to left adjust converted values as follows:
// +--------------------------+--------------------------+
// |           ADCH           |           ADCL           |
// +--------------------------+--------------------------+
// |  X  X  X  X  X  X  X  X  |                          | <-  8 bit value
// |                    X  X  |  X  X  X  X  X  X  X  X  | <- 10 bit value
// +--------------------------+--------------------------+
// |  7  6  5  4  3  2  1  0  |  7  6  5  4  3  2  1  0  |
// |  ^MSB              LSB^  |  ^MSB              LSB^  |
// +--------------------------+--------------------------+
#define ADC_ST1_LEFTSHIFT_BIT      ADLAR
// Set to enable interrupt
#define ADC_ST1_IRQ_BIT            ADIE
// Set to switch the ADC on (it requires also power saving to be disabled)
#define ADC_ST1_ENABLE_BIT         ADEN
// Set to enable power reduction
#define ADC_PRR_cpu_PRADC_BIT      PRADC

// Supported modes. Modes are set at compile time. It isn't possible to
// switch mode dynamically. Add more modes below.
#define ADC_ST2_MODEFR_MASK        ((1<<ADTS2)|(1<<ADTS1)|(1<<ADTS0))

// Reference voltage
#define ADC_MUX_REFAVC_MASK        (1<<REFS0)
#define ADC_MUX_REFALL_MASK        ((1<<REFS1)|ADC_MUX_REFAVC_MASK)
#define ADC_MUX_REFEXT_MASK        ADC_MUX_REFALL_MASK

// Onboard inputs
#define ADC_MUX_CHTMP_MASK         (1<<MUX3)
#define ADC_MUX_CHALL_MASK         (ADC_MUX_CHTMP_MASK|(1<<MUX2)|(1<<MUX1)|(1<<MUX0))
#define ADC_MUX_CHGND_MASK         ADC_MUX_CHALL_MASK
#define ADC_MUX_CHVBG_MASK         (ADC_MUX_CHTMP_MASK|(1<<MUX2)|(1<<MUX1))

// Optional free inputs
#define ADC_MUX_CH0_MASK           ADC_MUX_CHALL_MASK
#define ADC_MUX_CH1_MASK           (1<<MUX0)
#define ADC_MUX_CH2_MASK           (1<<MUX1)
#define ADC_MUX_CH3_MASK           ((1<<MUX1)|(1<<MUX0))
#define ADC_MUX_CH4_MASK           (1<<MUX2)
#define ADC_MUX_CH5_MASK           ((1<<MUX2)|(1<<MUX0))
#define ADC_MUX_CH6_MASK           ((1<<MUX2)|(1<<MUX1))
#define ADC_MUX_CH7_MASK           ((1<<MUX2)|(1<<MUX1)|(1<<MUX0))

// Available clocks
#define ADC_ST1_CLKALL_MASK        ((1<<ADPS2)|(1<<ADPS1)|(1<<ADPS0))
#define ADC_ST1_125KHZ_MASK        ADC_ST1_CLKALL_MASK
#define ADC_ST1_250KHZ_MASK        ((1<<ADPS2)|(1<<ADPS1))
#define ADC_ST1_500KHZ_MASK        ((1<<ADPS2)|(1<<ADPS0))
#define ADC_ST1_001MHZ_MASK        (1<<ADPS2)
#define ADC_ST1_002MHZ_MASK        ((1<<ADPS1)|(1<<ADPS0))
#define ADC_ST1_004MHZ_MASK        (1<<ADPS1)
#define ADC_ST1_008MHZ_MASK        ADC_ST1_CLKALL_MASK

#endif // CPU_MAP_ATMEGA328P
#endif // cpu_map_adc_h